234 lines
6.4 KiB
C
234 lines
6.4 KiB
C
/*
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* Copyright (C) 2010 - 2019 Xilinx, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
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* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
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* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*
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*/
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/*
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* platform_zynq.c
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*
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* Zynq platform specific functions.
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*
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* 02/29/2012: UART initialization is removed. Timer initializations are
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* removed. All unnecessary include files and hash defines are removed.
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* 03/01/2013: Timer initialization is added back. Support for SI #692601 is
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* added in the timer callback. The SI #692601 refers to the following issue.
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*
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* The EmacPs has a HW bug on the Rx path for heavy Rx traffic.
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* Under heavy Rx traffic because of the HW bug there are times when the Rx path
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* becomes unresponsive. The workaround for it is to check for the Rx path for
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* traffic (by reading the stats registers regularly). If the stats register
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* does not increment for sometime (proving no Rx traffic), the function resets
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* the Rx data path.
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*
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* </pre>
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*/
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#ifdef __arm__
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#include "platform_config.h"
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#ifdef PLATFORM_ZYNQ
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#include "xparameters.h"
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#include "xparameters_ps.h" /* defines XPAR values */
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#include "xil_cache.h"
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#include "xscugic.h"
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#include "lwip/tcp.h"
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#include "xil_printf.h"
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#include "netif/xadapter.h"
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#include "xscutimer.h"
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#include "xtime_l.h"
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#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
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#define TIMER_DEVICE_ID XPAR_SCUTIMER_DEVICE_ID
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#define INTC_BASE_ADDR XPAR_SCUGIC_0_CPU_BASEADDR
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#define INTC_DIST_BASE_ADDR XPAR_SCUGIC_0_DIST_BASEADDR
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#define TIMER_IRPT_INTR XPAR_SCUTIMER_INTR
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#define RESET_RX_CNTR_LIMIT 400
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void tcp_fasttmr(void);
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void tcp_slowtmr(void);
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static XScuTimer TimerInstance;
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#ifndef USE_SOFTETH_ON_ZYNQ
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static int ResetRxCntr = 0;
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extern struct netif server_netif;
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#endif
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volatile int TcpFastTmrFlag = 0;
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volatile int TcpSlowTmrFlag = 0;
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#if LWIP_DHCP==1
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volatile int dhcp_timoutcntr = 24;
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void dhcp_fine_tmr();
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void dhcp_coarse_tmr();
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#endif
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void
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timer_callback(XScuTimer * TimerInstance)
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{
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/* we need to call tcp_fasttmr & tcp_slowtmr at intervals specified
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* by lwIP. It is not important that the timing is absoluetly accurate.
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*/
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static int odd = 1;
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#if LWIP_DHCP==1
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static int dhcp_timer = 0;
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#endif
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TcpFastTmrFlag = 1;
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odd = !odd;
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#ifndef USE_SOFTETH_ON_ZYNQ
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ResetRxCntr++;
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#endif
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if (odd) {
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TcpSlowTmrFlag = 1;
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#if LWIP_DHCP==1
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dhcp_timer++;
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dhcp_timoutcntr--;
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dhcp_fine_tmr();
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if (dhcp_timer >= 120) {
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dhcp_coarse_tmr();
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dhcp_timer = 0;
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}
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#endif
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}
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/* For providing an SW alternative for the SI #692601. Under heavy
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* Rx traffic if at some point the Rx path becomes unresponsive, the
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* following API call will ensures a SW reset of the Rx path. The
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* API xemacpsif_resetrx_on_no_rxdata is called every 100 milliseconds.
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* This ensures that if the above HW bug is hit, in the worst case,
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* the Rx path cannot become unresponsive for more than 100
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* milliseconds.
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*/
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#ifndef USE_SOFTETH_ON_ZYNQ
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if (ResetRxCntr >= RESET_RX_CNTR_LIMIT) {
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xemacpsif_resetrx_on_no_rxdata(&server_netif);
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ResetRxCntr = 0;
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}
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#endif
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XScuTimer_ClearInterruptStatus(TimerInstance);
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}
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void platform_setup_timer(void)
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{
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int Status = XST_SUCCESS;
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XScuTimer_Config *ConfigPtr;
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int TimerLoadValue = 0;
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ConfigPtr = XScuTimer_LookupConfig(TIMER_DEVICE_ID);
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Status = XScuTimer_CfgInitialize(&TimerInstance, ConfigPtr,
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ConfigPtr->BaseAddr);
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if (Status != XST_SUCCESS) {
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xil_printf("In %s: Scutimer Cfg initialization failed...\r\n",
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__func__);
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return;
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}
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Status = XScuTimer_SelfTest(&TimerInstance);
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if (Status != XST_SUCCESS) {
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xil_printf("In %s: Scutimer Self test failed...\r\n",
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__func__);
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return;
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}
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XScuTimer_EnableAutoReload(&TimerInstance);
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/*
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* Set for 250 milli seconds timeout.
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*/
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TimerLoadValue = XPAR_CPU_CORTEXA9_0_CPU_CLK_FREQ_HZ / 8;
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XScuTimer_LoadTimer(&TimerInstance, TimerLoadValue);
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return;
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}
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void platform_setup_interrupts(void)
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{
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Xil_ExceptionInit();
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XScuGic_DeviceInitialize(INTC_DEVICE_ID);
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/*
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* Connect the interrupt controller interrupt handler to the hardware
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* interrupt handling logic in the processor.
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*/
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Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT,
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(Xil_ExceptionHandler)XScuGic_DeviceInterruptHandler,
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(void *)INTC_DEVICE_ID);
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/*
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* Connect the device driver handler that will be called when an
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* interrupt for the device occurs, the handler defined above performs
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* the specific interrupt processing for the device.
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*/
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XScuGic_RegisterHandler(INTC_BASE_ADDR, TIMER_IRPT_INTR,
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(Xil_ExceptionHandler)timer_callback,
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(void *)&TimerInstance);
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/*
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* Enable the interrupt for scu timer.
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*/
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XScuGic_EnableIntr(INTC_DIST_BASE_ADDR, TIMER_IRPT_INTR);
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return;
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}
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void platform_enable_interrupts()
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{
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/*
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* Enable non-critical exceptions.
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*/
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Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ);
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XScuTimer_EnableInterrupt(&TimerInstance);
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XScuTimer_Start(&TimerInstance);
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return;
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}
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void init_platform()
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{
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platform_setup_timer();
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platform_setup_interrupts();
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return;
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}
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void cleanup_platform()
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{
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Xil_ICacheDisable();
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Xil_DCacheDisable();
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return;
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}
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u64_t get_time_ms()
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{
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#define COUNTS_PER_MILLI_SECOND (COUNTS_PER_SECOND/1000)
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XTime tCur = 0;
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XTime_GetTime(&tCur);
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return (tCur/COUNTS_PER_MILLI_SECOND);
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}
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#endif
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#endif
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